GitHub

RISC-V Core in VHDL for FPGA Implementation

This project implements a RISC-V processor core written in VHDL, designed for synthesis on an FPGA. It is developed as an academic project to explore computer architecture, digital design, and ...
IEEE

A Pilot Study: Introducing HDL Lab Course for Effective Learning of Digital Design

Abstract: Incorporating VHDL programming and implementation using programmable logic devices (PLD) in fundamental digital design course for Electronics Engineering at undergraduate level has become ...