GitHub

RISC-V Core in VHDL for FPGA Implementation

This project implements a RISC-V processor core written in VHDL, designed for synthesis on an FPGA. It is developed as an academic project to explore computer architecture, digital design, and ...
Microsoft

CORE: Resolving Code Quality Issues using LLMs

As software projects progress, quality of code assumes paramount importance as it affects reliability, maintainability and security of software. For this reason, static analysis tools are used in ...
IEEE

Security-Preserving Multi-Robot Path Planning for Boolean Specification Tasks Using Labeled Petri Nets

Abstract: This letter investigates the path planning of multi-robot systems for high-level tasks described by Boolean specifications and security constraints. We assume that the behavior of each robot ...
IEEE

A Grover-Meets-Simon Approach to Match Vector Boolean Functions

Abstract: The Boolean matching problem via NP-equivalence requires determining whether two Boolean functions are equivalent or not up to a permutation and negation of the input binary variables. Its ...