EDN

MIPS debuts new cores, instruction set

SAN JOSE, Calif. — MIPS Technologies Inc. is upgrading two of its cores and introducing a new instruction set architecture. The products aim to expand the company's relatively small presence in 32-bit ...
Electronic Design

MIPS’ Instruction-Set Simulator Gets Carbonized

Carbon Design Systems, a supplier of tools for the automatic creation, validation, and deployment of virtual hardware models, joined the MIPS Alliance Program (MAP), adding MIPS Technologies to its ...
Semiconductor Engineering

Instruction Set Architecture (ISA)

An instruction set architecture (ISA) defines the set of basic operations a computer must support. This includes the functional definition of operations and precise descriptions of how to invoke and ...
PC World

Chinese Chip Project Licenses MIPS Architecture

The academy in charge of advancing China’s homegrown microprocessors has licensed the MIPS chip architecture, burying an old controversy over its use of parts of the MIPS instruction set. China’s ...
eWeek

MIPS Goes Open Source, Challenges Arm and RISC-V

eWEEK content and product recommendations are editorially independent. We may make money when you click on links to our partners. Learn More. MIPS has had a long, strange trip over the past few ...